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Fix RV64 context_restore bug when F/D extension is enabled
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Signed-off-by: Jim Huang <[email protected]>
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Jer6y authored and jserv committed Nov 21, 2024
1 parent 51e2a04 commit 0670e81
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Showing 2 changed files with 12 additions and 0 deletions.
8 changes: 8 additions & 0 deletions ports/risc-v64/gnu/src/tx_thread_context_restore.S
Original file line number Diff line number Diff line change
Expand Up @@ -149,6 +149,10 @@ _tx_thread_context_restore:
LOAD t0, 30*REGBYTES(sp) // Recover mepc
csrw mepc, t0 // Setup mepc
li t0, 0x1880 // Prepare MPIP
#if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double)
li t1, 1 << 13
or t0, t1, t0
#endif
csrw mstatus, t0 // Enable MPIP

LOAD x1, 28*REGBYTES(sp) // Recover RA
Expand Down Expand Up @@ -259,6 +263,10 @@ _tx_thread_no_preempt_restore:
LOAD t0, 240(sp) // Recover mepc
csrw mepc, t0 // Setup mepc
li t0, 0x1880 // Prepare MPIP
#if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double)
li t1, 1 << 13
or t0, t1, t0
#endif
csrw mstatus, t0 // Enable MPIP

LOAD x1, 28*REGBYTES(sp) // Recover RA
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4 changes: 4 additions & 0 deletions ports/risc-v64/gnu/src/tx_thread_schedule.S
Original file line number Diff line number Diff line change
Expand Up @@ -201,6 +201,10 @@ _tx_thread_schedule_loop:
LOAD t0, 30*REGBYTES(sp) // Recover mepc
csrw mepc, t0 // Store mepc
li t0, 0x1880 // Prepare MPIP
#if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double)
li t1, 1 << 13
or t0, t1, t0
#endif
csrw mstatus, t0 // Enable MPIP

LOAD x1, 28*REGBYTES(sp) // Recover RA
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