From aa06bff4303da685cbeb172b425f76f6aed83bf6 Mon Sep 17 00:00:00 2001 From: Kevron Rees Date: Wed, 27 Sep 2017 08:53:38 -0700 Subject: [PATCH] Enable force platform minnowboard turbot Compile error would result if force minnowboard max. This is because mraa_intel_minnowboard_byt_compatible signature requires bool option for max or turbot board variations. This patch allows user to force platform for either max or turbot without compile error. --- src/CMakeLists.txt | 2 ++ src/x86/x86.c | 4 +++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index ed9b35627..892b94b64 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -68,6 +68,8 @@ if (NOT ${MRAAPLATFORMFORCE} STREQUAL "ALL") set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_edison_fab_c.c) elseif (${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_MINNOWBOARD_MAX") set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_minnow_byt_compatible.c) + elseif (${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_MINNOWBOARD_TURBOT") + set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_minnow_byt_compatible.c) elseif (${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_NUC5") set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_nuc5.c) elseif (${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_SOFIA_3GR") diff --git a/src/x86/x86.c b/src/x86/x86.c index 8836ff9f6..0d735bc9e 100644 --- a/src/x86/x86.c +++ b/src/x86/x86.c @@ -131,7 +131,9 @@ mraa_x86_platform() #elif defined(xMRAA_INTEL_DE3815) plat = mraa_intel_de3815(); #elif defined(xMRAA_INTEL_MINNOWBOARD_MAX) - plat = mraa_intel_minnowboard_byt_compatible(); + plat = mraa_intel_minnowboard_byt_compatible(0); + #elif defined(xMRAA_INTEL_MINNOWBOARD_TURBOT) + plat = mraa_intel_minnowboard_byt_compatible(1); #elif defined(xMRAA_INTEL_GALILEO_GEN1) plat = mraa_intel_galileo_rev_d(); #elif defined(xMRAA_INTEL_NUC5)