Investigate homogeneous prologues/epilogues

[resistor]

The AArch64 backend implements a size optimization called homogeneous prologues/epilogues, which essentially means that it strongly canonicalizes prologues and epilogues to increase the success rate of outlining on those code sequences, and even does custom pre-outlining to workaround limitations of the generic outline.

We should investigate whether it would be worth porting this optimization to RISCV and thence to CHERIoT.

Relevant commit: llvm/llvm-project@4f58b1b